2018/31/B/ST7/00954
Keywords:
AC/DC converter current control grid voltage dips and sags higher harmonics resistance to distortions
Descriptors:
Panel:
ST7 - Systems and communication engineering: electronics, communication, optoelectronics
Host institution :
Politechnika Warszawska, Wydział Elektryczny
woj. mazowieckie
Principal investigator (from the host institution):
Number of co-investigators in the project: 5
Call: OPUS 16 - announced on 2018-09-14
Amount awarded: 1 278 540 PLN
Project start date (Y-m-d): 2019-07-11
Project end date (Y-m-d): 2023-01-10
Project duration:: 36 months (the same as in the proposal)
Project status: Project completed
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Note - project descriptions were prepared by the authors of the applications themselves and placed in the system in an unchanged form.