Projects funded by the NCN

Information on the principal investigator and host institution

Information of the project and the call

Keywords

Equipment

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Programming Methods for Distributed Reconfigurable Systems.

2015/19/N/ST6/01191

Keywords:

FPGA reconfigurable systems reprogrammable systems distributed systems

Descriptors:

  • ST6_2: Computer systems, parallel/distributed systems, sensor networks, embedded systems, cyber-physical systems
  • ST6_1: Computer architecture, ubiquitous computing

Panel:

ST6 - Computer science and informatics: informatics and information systems, computer science, scientific computing, intelligent systems

Host institution :

Politechnika Łódzka, Wydział Elektrotechniki, Elektroniki, Informatyki i Automatyki

woj. łódzkie

Other projects carried out by the institution 

Principal investigator (from the host institution):

Joanna Kupis 

Number of co-investigators in the project: 3

Call: PRELUDIUM 10 - announced on 2015-09-15

Amount awarded: 85 800 PLN

Project start date (Y-m-d): 2016-06-22

Project end date (Y-m-d): 2018-06-21

Project duration:: 24 months (the same as in the proposal)

Project status: Project settled

Project description

Download the project description in a pdf file

Note - project descriptions were prepared by the authors of the applications themselves and placed in the system in an unchanged form.

Equipment purchased [PL]

  1. Komputer klasy serwer (12 000 PLN)
  2. Komputer klasy desktop (12 000 PLN)

Information in the final report

  • Publication in academic press/journals (3)
  • Articles in post-conference publications (2)
  1. ARUZ — Large-scale, massively parallel FPGA-based analyzer of real complex systems
    Authors:
    Rafał Kiełbik, Krzysztof Hałagan, Witold Zatorski, Jarosław Jung, Jacek Ulański, Andrzej Napieralski, Kamil Rudnicki, Piotr Amrozik, Grzegorz Jabłoński, Dominik Stożek, Piotr Polanowski, Zbigniew Mudza, Joanna Kupis, Przemysław Panek
    Academic press:
    Computer Physics Communications (rok: 2018, tom: 232, strony: 22-34), Wydawca: Elsevier
    Status:
    Published
    DOI:
    10.1016/j.cpc.2018.06.010 - link to the publication
  2. The Application of High Level Synthesis for Implementation of Lattice Boltzmann Method in ARUZ
    Authors:
    Grzegorz Jabłoński, Joanna Kupis
    Academic press:
    International Journal of Microelectronics and Computer Science (rok: 2017, tom: 8, strony: 36-42), Wydawca: Politechnika Łódzka
    Status:
    Published
    DOI:
    brak - link to the publication
  3. Optimized Implementation of Lattice Boltzmann Method in ARUZ
    Authors:
    Grzegorz Jabłoński, Joanna Kupis
    Academic press:
    International Journal of Microelectronics and Computer Science (rok: 2018, tom: 9, strony: 79-84), Wydawca: Politechnika Łódzka
    Status:
    Published
    DOI:
    brak - link to the publication
  1. Performance estimation of Lattice Boltzmann method implementation in ARUZ
    Authors:
    Grzegorz Jabłoński, Joanna Kupis
    Conference:
    Mixed Design of Integrated Circuits and Systems, 2017 MIXDES - 24th International Conference (rok: 2017, ), Wydawca: IEEE
    Data:
    konferencja 22-24 czerwca 2017
    Status:
    Published
  2. Performance Optimization of Implementation of Lattice Boltzmann Method in ARUZ
    Authors:
    Grzegorz Jabłoński, Joanna Kupis
    Conference:
    Mixed Design of Integrated Circuits and Systems, 2018 MIXDES - 25th International Conference (rok: 2018, ), Wydawca: IEEE
    Data:
    konferencja 21-23 czerwca 2018
    Status:
    Published

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