Projects funded by the NCN

Information on the principal investigator and host institution

Information of the project and the call

Keywords

Equipment

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Pulse processing in sub-GHz range for semiconductor pixel detectors

2013/09/B/ST7/01627

Keywords:

semiconductor pixel detector ASIC

Descriptors:

  • ST7_2: Electrical engineering: power components and/or systems

Panel:

ST7 - Systems and communication engineering: electronics, communication, optoelectronics

Host institution :

Akademia Górniczo-Hutnicza im. Stanisława Staszica w Krakowie, Wydział Elektrotechniki, Automatyki, Informatyki i Inżynierii Biomedycznej, Katedra Metrologii i Elektroniki

woj. małopolskie

Other projects carried out by the institution 

Principal investigator (from the host institution):

dr hab. Robert Szczygieł 

Number of co-investigators in the project: 6

Call: OPUS 5 - announced on 2013-03-15

Amount awarded: 1 621 140 PLN

Project start date (Y-m-d): 2014-03-18

Project end date (Y-m-d): 2018-10-17

Project duration:: 55 months (the same as in the proposal)

Project status: Project settled

Equipment purchased [PL]

  1. Urządzenie do softwarowo definiowanych testów układów scalonych oparte na PXI. (193 400 PLN)
  2. Generator AFG325IC.
  3. Wyposażenie do testów automatycznych, oscyloskop gigahercowy (180 000 PLN)

Information in the final report

  • Publication in academic press/journals (6)
  • Articles in post-conference publications (4)
  1. Fully 3-D Integrated Pixel Detectors for X-Rays
    Authors:
    G. W. Deptuch, G. Carini, P. Enquist, P. Gryboś, , S. Holm, R. Lipton, P. Maj, R. Patti, D.P. Siddons, R. Szczygieł, R. Yarema
    Academic press:
    IEEE Transactions on Electron Devices (rok: 2016, tom: 63, strony: 205-214), Wydawca: IEEE
    Status:
    Published
    DOI:
    10.1109/TED.2015.2448671 - link to the publication
  2. Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology
    Authors:
    R.Kłeczek
    Academic press:
    Journal of Insturmentation (rok: 2016, tom: 11, strony: C12001), Wydawca: IOP Publishing
    Status:
    Published
    DOI:
    10.1088/1748-0221/11/12/C12001 - link to the publication
  3. Simulation approach to charge sharing compensation algorithms with experimental cross-check
    Authors:
    A. Krzyżanowska,G. Deptuch, P. Maj, P. Gryboś, R. Szczygieł
    Academic press:
    Journal of Instrumentation (rok: 2017, tom: 12, strony: C03071), Wydawca: IOP Publishing
    Status:
    Published
    DOI:
    10.1088/1748-0221/12/03/C03071 - link to the publication
  4. Characterization of the photon counting CHASE Jr., chip built in a 40-nm CMOS process with a charge sharing correction algorithm using a collimated X-Ray beam
    Authors:
    A. Krzyżanowska, G. W. Deptuch, P. Maj, P. Gryboś, and R. Szczygieł
    Academic press:
    IEEE Transactions on Nuclear Science (rok: 2017, tom: vol. 64 no. 9, strony: 2561–2568), Wydawca: IEEE
    Status:
    Published
    DOI:
    10.1109/TNS.2017.2734821 - link to the publication
  5. Testing multistage gain and offset trimming in a single photon counting IC with a charge sharing elimination algorithm
    Authors:
    Krzyżanowska, A. Gryboś, P. Szczygieł, R. Maj, P.
    Academic press:
    Journal of Instrumentation (rok: 2015, tom: 10, strony: C12003), Wydawca: IOP Publishing
    Status:
    Published
    DOI:
    10.1088/1748-0221/10/12/C12003 - link to the publication
  6. Single photon-counting pixel readout chip operating up to 1.2 Gcps/mm2 for digital X-ray imaging systems
    Authors:
    R. Kłeczek, P. Gryboś, R. Szczygieł, P. Maj
    Academic press:
    IEEE Journal of Solid-State Circuits (rok: 2018, tom: vol. 53, no. 9, strony: 2651–2662), Wydawca: IEEE
    Status:
    Published
    DOI:
    10.1109/JSSC.2018.2851234 - link to the publication
  1. Design of Matrix Controller for Hybrid Pixel Detectors
    Authors:
    B. Tutro, K. Urbański, R. Szczygieł
    Conference:
    2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) (rok: 2018, ), Wydawca: IEEE
    Data:
    konferencja 21-23.06.2018
    Status:
    Published
  2. Digitally assisted low noise and fast signalprocessing charge sensitive amplifier forsingle photon counting systems
    Authors:
    P. Grybos, A. Drozd, R. Kleczek, P. Maj, R. Szczygiel
    Conference:
    2015 IEEE International Conference on Industrial Technology (rok: 2015, ), Wydawca: IEEE
    Data:
    konferencja 17-19 marzec 2015
    Status:
    Published
  3. Ultrafast signal processing readout front-end electronics in CMOS 40 nm technology for hybrid pixel detectors operating in Single Photon Counting mode
    Authors:
    R. Kleczek, P. Grybos, R. Szczygiel
    Conference:
    2017 International Image Sensor Workshop (rok: 2017, ), Wydawca: International Image Sensor Society
    Data:
    konferencja 30.05-3.06.2017
    Status:
    Published
  4. Charge sensitive amplifier for nanoseconds pulse processing time in CMOS 40 nm technology
    Authors:
    R. Kleczek, P. Grybos, R. Szczygiel
    Conference:
    2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES) (rok: 2015, ), Wydawca: IEEE
    Data:
    konferencja 25-27.06.2015
    Status:
    Published

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