Optymalizacja wydajności obliczeniowej metody elementów skończonych w architekturze CUDA

2013/08/T/ST7/00531

Descriptors

  • ST7_6: Technologie telekomunikacyjne, technologie wysokiej częstotliwości
  • ST6_6: Algorytmika, algorytmy równoległe, rozproszone i sieciowe, algorytmiczna teoria gier
  • ST6_12: Obliczenia naukowe, narzędzia modelowania i symulacji

Panel

ST7 – Systems and communication engineering: electronics, communication, optoelectronics

Host institution

Politechnika Gdańska, Wydział Elektroniki, Telekomunikacji i Informatyki

Voivodeship: pomorskie

Other projects carried out by the institution »

Principal investigator (from the host institution)

Adam Kazimierz Dziekoński

Number of co-investigators in the project: 2

Call

ETIUDA 1 – announced on 2012-12-15

Amount awarded
65 303 PLN
Project start date
2013-10-01
Project end date
2014-09-30
Project duration
12 months (the same as in the proposal)
Project status
Project settled

Information in the final report

Publication in academic press/journals (1)

  1. GPU-Accelerated Finite-Element Matrix Generation for Lossless, Lossy, and Tensor Media [EM Programmer's Notebook]

    Authors:
    Dziekonski, A.; Sypek, P.; Lamecki, A.; Mrozowski, M.
    Academic press:
    Antennas and Propagation Magazine, IEEE (year: 2014, volume: 56, pages: 186-197), Publisher: IEEE
    Status:
    Published
    DOI:
    10.1109/MAP.2014.6971943 – link to the publication

Book publications / chapters in book publications (1)

  1. A Task-Scheduling Approach for Efficient Sparse Symmetric Matrix-Vector Multiplication on a GPU

    Authors:
    P. MIRONOWICZ, A. DZIEKONSKI, M. MROZOWSKI
    Book:
    SIAM: SIAM Journal on Scientific Computing (SISC) (volume: -, pages: -), Publisher: SIAM
    Status:
    Accepted for publication

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Graphic design and implementation: Jakub Piotrowski